YMTC Introduces Xtacking 30 Memory Architecture Chinese 3D NAND
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YMTC Introduces Xtacking 3.0 Memory Architecture – Chinese 3D NAND Gets Even Faster

Today at the Flash Memory Summit (FMS) 2022, China’s YMTC introduced the X3-9070 3D NAND flash memory, based on the innovative Xtacking 3.0 architecture. New Chinese 3D NAND chips will be able to offer higher speed and efficiency.

    Image source: YMTC

Image source: YMTC

The Xtacking architecture was introduced in 2018 and has since evolved into the third generation. It is assumed that an array of 3D NAND memory cells is on a separate chip and the power and control circuitry is placed on the other. Arrays and controllers can be manufactured using different technical processes since the former and the latter are manufactured on different silicon wafers. The control chip is then combined with the arrays of memory cells, and the result is a full-featured 3D NAND memory chip.

Producing cells and controllers separately allows you to save space at the storage crystal level (producing more cells from each disk), as well as upgrade cells or controllers without being tied to the production of one or the other. At the moment, the second scenario is being implemented, when YMTC is preparing to release a more productive 3D NAND without changing the technology for manufacturing memory arrays.

Since we are talking about improving logic and performance, the developer has not spent a single line on achieving this or that record in the manufacture of multiple layers of 3D NAND, such as Micron and SK Hynix, who announced the release of 232 – and 238-layered 3D NAND memory, respectively. Instead, YMTC reported that the performance of the new Xtacking 3.0-enabled chips will reach I/O speeds of up to 2400 MT/s per pin. It also claims to be compatible with the ONFI 5.0 interface and achieve 50% better performance than the previous generation of products.

    An example of the combination of a controller (top crystal) and a storage array (bottom crystal).  Image source: YMTC

An example of the combination of an Xtacking controller (top chip) and a memory array (bottom chip). Image source: YMTC

In addition, the X3-9070 is the highest density flash product in YMTC history, offering 1TB of storage capacity in an ultra-compact monoblock. The new controller now supports 6-level flash cell organization, while previously 4-level organization was supported. Supporting 6 cell ranges for independent processing allows you to expand parallel operations and increase memory performance. In particular, productivity promises an increase of up to 50% while reducing consumption by up to 25%.

In addition, the company does not specify when the new architecture will appear in its products.

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Dylan Harris

Dylan Harris is fascinated by tests and reviews of computer hardware.

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