TSMC Launches Pilot Production of 3nm Chips, but Faces Packaging Problems

By message Taiwanese sources, TSMC has begun pilot production of 3nm chips. The mass release of solutions for the orders of Apple, AMD, Qualcomm and others is planned in about a year – in the fourth quarter of 2022. And everything would be fine, but the problem of the lagging of technical processes for packaging complex multichip solutions has surfaced, and without this, real progress will be delayed.

Image source: Pixabay

Image source: Pixabay

It is no secret that the future of the most advanced semiconductor solutions lies in the creation of bulk heterogeneous structures. Crystals in a composite chip will be arranged both horizontally and vertically. In this case, the number of interchip connections will continuously grow and this will affect the diameter or area of ​​the contacts. The contact pitch will have to be reduced or the chips will begin to rapidly increase in size. But, as TSMC admitted, the company is having difficulty scaling interconnects below 2 microns.

It turns out that TSMC successfully copes with the production of crystals using the most advanced technological processes, but packing several crystals into one common block (case) using interposers and substrates begins to lag behind. According to the company’s goals, with each new generation of chips, the contact pitch should be reduced by 70%. With regard to the 3-nm technical process, this condition, judging by the statements, is not met. What is the threat? At a minimum, production will become more expensive until TSMC or its chip packaging subcontractors overcome the hurdles.

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Dylan Harris

Dylan Harris is fascinated by tests and reviews of computer hardware.

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