At the latest quarterly earnings conference, CC Wei, CEO of TSMC, said that the company is the first manufacturer to mass-produce high-yield 3nm products. At the same time, the demand for this service exceeds TSMC’s capabilities, and by the end of the year the share of 3nm process technology in the company’s revenue structure will be limited to 5-6%.
Recall that Samsung Electronics formally overtook TSMC by several months in terms of dominance of production of 3nm products, but the latter tried to make up its deficit by expanding production volume in this area more rapidly. In practice, the revenue from the sale of TSMC 3nm products will not reach “significant values” until the third quarter of this year, as the company’s CEO himself acknowledged.
According to the opinion analysts Susquehanna International Group, even under these less than ideal conditions, TSMC remains the technological leader, since Samsung cannot yet offer stable product quality, and if Intel’s contract division will catch up with these two competitors technologically, then it will only be in a few years. According to experts, in the second half of this year TSMC should start production of 3 nm processors Apple A17 and M3, as well as a number of server processors based on N4 and N3 technologies. Integrated graphics chips for Intel Meteor Lake CPUs are manufactured by TSMC using N5 process technology, while AMD Genoa and NVIDIA Grace server processors are manufactured using N5 and N4 process technologies. They are accompanied by NVIDIA H100 accelerators made using N5 technology.
As analysts from Arete Research suggest, Apple will only pay TSMC for good N3 chips in the first three or four quarters. The transition to payment for full silicon wafers will only be possible when the yield of suitable products exceeds 70%. Only in the first half of next year will Apple pay TSMC $17,000 for a single 3nm silicon wafer. According to the authors of the forecast, the product yield for the 3 nm processors from Apple currently does not exceed 55%, but this is also considered a good indicator of this phase of the life cycle. TSMC aims to increase this level by five percentage points each quarter.
The A17 processor, intended for use in Apple smartphones, will have a die area of around 100 or 110 mm2and the M3 processor for laptops and desktops gets an area of about 135 or 150 mm2. According to the source, TSMC had to delay the adoption of the 3nm process due to the need to use multi-mask EUV lithography. In the first generation of TSMC’s 3nm technology, the chips produced by the chips will be relatively large, and scaling down will only be possible after the switch to more modern lithography equipment in the next six months at the earliest. With a silicon wafer, 30% more crystals can be obtained after completing this migration.
TSMC expects to dominate the production of 2nm chips in 2025, compared to competitors’ proposals, they will have more attractive transistor density and power efficiency. TSMC’s economic performance is currently suffering from low line utilization, which averaged less than 66% in the second quarter of this year, and has fallen below 50% across the board in the N7-series process segment. The release of new products in the second half of the year will allow TSMC to increase equipment utilization. In the fourth quarter of last year, TSMC customers’ inventory levels were several times higher than the norm at some of them. At the same time, the indicator exceeded the average figure of NVIDIA by more than two times, AMD exceeded the norm by about a third. The overstocking was caused by a drop in demand for these companies’ products.