TSMC cant package chips for NVIDIA AI accelerators it

TSMC can’t package chips for NVIDIA AI accelerators – it will take 1.5 years to fill the shortage

Experts have repeatedly expressed the opinion that the volume of production of the same NVIDIA computational accelerators for artificial intelligence systems is now limited not by TSMC’s capabilities in processing silicon wafers, but by its ability to test and package the appropriate chips in the right quantities . Management promises to eliminate the bottlenecks in about a year and a half.

    Image source: NVIDIA

Image source: NVIDIA

About this CEO of TSMC Mark Liu as mentioned earlier Nikkei Asian Review, said at the SEMICON industry event currently being held in Taiwan. According to him, the existing restrictions are temporary and should be lifted by the end of 2024. Mark Liu admitted that the problem lies precisely in TSMC’s ability to test and package a limited number of chips with complex spatial layouts, including the NVIDIA A100 and H100 accelerators.

A TSMC spokesman explains that the demand for CoWoS chip packaging has suddenly increased this year and has tripled. “Now we cannot 100% satisfy customer needs, but we try to cover at least 80%”, – admitted the CEO of TSMC. In his opinion, the situation is temporary, and as chip testing and packaging capacities expand, the problem will be resolved within a year and a half. At a recent quarterly reporting conference, TSMC management pledged to double core production capacity by the end of 2024. This will be facilitated by the construction of a new chip test and packaging facility in Taiwan, in which TSMC will invest $2.9 billion.

According to Mark Liu, the semiconductor industry must deal with “a paradigm shift”. In order to further increase the number of transistors in chips, manufacturers must increasingly resort to complex spatial arrangements. If flagship accelerators can now combine up to 100 billion transistors, according to TSMC management, that number will increase tenfold to more than a trillion in the next decade. Such advances are made possible by combining multiple crystals in one package.

Incidentally, Intel intends to quadruple its packaging and testing capabilities by 2025 and rebrand its companies that use legacy lithography technologies for these types of services.

About the author

Dylan Harris

Dylan Harris is fascinated by tests and reviews of computer hardware.

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