ASML managed to ship the first lithographic scanner with a high numerical aperture to Intel back in December last year, but even then it was known that such equipment would not be used as part of the serial production of chips using Intel 18A technology. ASML itself claims that High-NA generation scanners will begin to be used by customers in mass production from 2026–2027.
Let us recall that Intel is going to use the first lithography scanner with a high numerical aperture for experiments at its research center in Oregon in combination with Intel 18A technology, but such equipment will be introduced into production only at subsequent stages of lithography. This week, as reported Reutersthe Dutch company ASML invited representatives of the press to its enterprise to demonstrate samples of such equipment and talk about the prospects for their use.
Interestingly, analysts and representatives of ASML differ in their ideas about the timing of reasonable implementation of High-NA equipment in the context of mass production of chips. Semianalysis experts, for example, suggest that the use of such lithographic scanners will become economically feasible no earlier than 2030. ASML management rejects such arguments, insisting that the transition to a new generation of scanners will provide economic returns much earlier, and it will begin as early as 2026 or 2027.
Samsung and TSMC are already showing interest in such ASML equipment, but the management of the latter recently made it clear that economic feasibility will seriously influence the timing of the introduction of High-NA technology on the assembly line of this largest contract chip manufacturer in the world. Secondly, TSMC is not ready to transfer customers’ technical processes to new equipment if it is not convenient for them. In short, it seems that TSMC is not yet ready to rush into using high numerical aperture lithography equipment.
Representatives of ASML this week explained that the High-NA generation lithographic systems it produces weigh 150 tons and, when disassembled, occupy 250 containers. To make such a scanner ready for operation requires the work of 250 engineers over six months. ASML currently has 10 to 20 orders for the supply of such scanners from customers, and memory manufacturers such as Micron and SK hynix are also showing interest in them. By 2028, ASML plans to produce up to 20 such systems on an annual basis. Chip manufacturers using new equipment can reduce the geometric dimensions of semiconductor elements by 40%, increasing the density of transistors by up to three times. One such system costs about $380 million. Several copies of such equipment will be shipped to customers during this year.